1. Field of the Invention
The present invention relates to user-programmable antifuse devices. More particularly, the present invention relates to several embodiments of a raised tungsten plug antifuse and to methods for fabricating such antifuses.
2. The Prior Art
Various antifuse structures are known in the prior art. The prior-art antifuses may be divided into two groups. A first group includes those antifuses in which the lower electrode comprises a conductive region in a semiconductor substrate and the upper electrode comprises a layer above the substrate. A layer of antifuse material disposed between the lower and upper electrodes usually comprises a single dielectric layer or a plurality of dielectric layers. An example of such an antifuse is shown in U.S. Pat. No. 4,823,181 to Mohsen et al. and U.S. Pat. No. 4,543,594 to Mohsen et al.
A second group of antifuses comprises antifuses in which both electrodes are disposed in layers above the surface of a substrate which may be either a conducting material, a semiconductor material, or an insulating material. The electrodes may comprise materials such as metal layers or polysilicon layers. A layer of antifuse material disposed between the lower and upper electrodes may comprise a single dielectric layer, a plurality of dielectric layers, a layer of a material such as amorphous silicon, or a layer of a material such as amorphous silicon in combination with one or more dielectric layers. The second group of antifuses is more closely associated with the present invention.
Examples of above-the-substrate antifuses include those disclosed in U.S. Pat. No. 5,070,384 to McCollum et al., U.S. Pat. No. 5,175,715 to Husher et al., U.S. Pat. No. 5,181,096 to Forouhi, U.S. Pat. No. 5,272,101 to Forouhi et al., and U.S. Pat. No. 5,196,724 to Gordon et al.
It is an object of the present invention to provide an improved above-the-substrate antifuse and methods for fabricating such an antifuse.
An antifuse according to the present invention includes a lower electrode formed from a metal layer in a microcircuit. A interlayer dielectric layer is disposed over the lower electrode and has an aperture formed therein. A conductive plug, formed from a material such as tungsten, is formed in the aperture. The upper surface of the interlayer dielectric is etched back to create a raised portion of the plug extending from about 250 to about 1500 angstroms above the upper surface of the interlayer dielectric. The upper edges of the plug are rounded. An antifuse layer, preferably comprising a silicon nitride, amorphous silicon, silicon nitride sandwich or a silicon nitride, amorphous silicon, silicon nitride sandwich covered by a titanium nitride layer, is disposed above the plug. Oxide spacers may be disposed around the edges of the antifuse layer. An upper electrode, preferably comprising a metal layer including a titanium nitride barrier layer is disposed over the antifuse layer.
The antifuse of the present invention may be fabricated according to another aspect of the present invention. A lower electrode is first formed from a metal layer disposed over an underlying insulating layer. A interlayer dielectric layer is formed over the lower electrode and is planarized using techniques such as chemical mechanical polishing (CMP). An aperture is formed in the interlayer dielectric layer.
A conductive plug, comprising a material such as tungsten, is formed in the aperture. The upper surface of the interlayer dielectric is then etched back, exposing a portion of the plug to create a raised portion of the plug. The upper edges of the plug are then rounded using, for example, a CMP process step which also serves to smooth any rough points from the plug surface.
An antifuse layer, preferably comprising a silicon nitride, amorphous silicon, silicon nitride sandwich or a silicon nitride, amorphous silicon, silicon nitride sandwich covered by a titanium nitride layer, is formed and defined over the plug and at least a portion of the upper surface of the interlayer dielectric layer. In a variation of this process sequence, an additional titanium nitride layer is formed over the plug and the upper surface of the interlayer dielectric layer prior to forming the antifuse layer or layers.
Oxide spacers are then formed around the edges of the antifuse layer. An upper electrode, preferably comprising a metal layer, is then formed and defined over the antifuse layer and the oxide spacers.